[newfrance]

Dear all:
I met a problem on my way to implement SGDMA transfer complied with PCI Master/Target core in SOPC system. Without NIOSII, I applied one Bar of PCI to setup the related control registers. My action is simple, to move the on-chip memory to DRAM of PC. The similar operation had been success under simple DMA controller, but I failed in SGDMA. It seems the whole SGDMA process failed.
To simplify the problem, I change my design to move the data of on-chip memory to another blocks of on-chip memory. The whole process is under SOPC system itself and only the PCI target core are required to setup registers. But, it still failed. The following are my control step, and the attached file is my SOPC address assignment. Please kindly gives me some advices, I'M gonna crazy by it.

1. Bar0+0x50, 0x00000080 //PCI INT enable
2. Bar1+0x00, 0x00004000
Bar1+0x08, 0x00005000
Bar1+0x10, 0x00000020
Bar1+0x18, 0x0100
Bar1+0x1F, 0x01
//setup only single descriptor
3. Bar1+0x1020, 0x00000000 //setup Next Descriptor address in control register
4. Bar1+0x1010, 0x00000028 //RUN + INT_enable

I have simplified it as single descriptor operation, but nothing happened.

Or could anyone tell me where can I find the related example or document mention these settings!? I only find the one under NIOSII software control with delicate library, but all I need is the basic registers control example. Thank you for all your great help.

[newfrance]

Dear all:
I

[newfrance]

I have gotten the answers from some good friends. It seems I forgot to set "Owned by HW" bit. All problem have been resolved. Thank you, all of you.